Mad1_CMad2 + OMad2 = Mad1_CMad2_OMad2
Mad1_CMad2_OMad2 + Cdc20 > Mad1_CMad2 + Cdc20_CMad2
Cdc20_CMad2 > Cdc20 + OMad2
Cdc20_CMad2 + Bub3_BubR1 = MCC
Bub3_BubR1 + Cdc20 = Bub3_BubR1_Cdc20
OMad2 + Cdc20 > Cdc20_CMad2
MCC + APC > MCC_APC
MCC_APC > OMad2 + Bub3_BubR1 + APC_Cdc20
APC + Cdc20 = APC_Cdc20
Trigger: gt(time, 2000)
Delay:
Assignments:
Note that constraints are not enforced in simulations. It remains the responsibility of the user to verify that simulation results satisfy these constraints.